This invention relates to a disk array controller utilizing a shared memory type multiprocessor system, and the invention relates in particular to technology for broadcasting of information shared between processors.
A disk array controller utilizing a shared memory type multiprocessor system has a structure as shown in FIG. 3. The controller shown in FIG. 3 is comprised of a plurality of CPU-PK (packages) 301, a shared memory package (SM-PK) #A 303 holding shared memories for storing control information, and a shared memory package (SM-PK) #B 304, all connected by a shared memory bus 302. Each CPU-PK (package) is connected to either a host computer or a disk device. Each CPU-PK (package) has a plurality of CPUs, and each CPU performs data transmission from the disk device or the host computer, or controls data transmission to the disk device or the host computer utilizing control information stored in the memory. In this way, when each CPU is connected on a common bus, the information from each CPU is routed along the common bus so that information from a particular CPU is sent to all the other CPUs and broadcasting can easily be performed.
Though not related to a disk array controller, Japanese Published Unexamined Patent Application No. 61-45647 discloses a multibroadcast system connected to a common bus for broadcasting.